1. Field of the Invention
The present invention relates to a semiconductor integrated noise absorbing circuit, in particular to a circuit for protecting an input signal against output noise from a semiconductor integrated circuit.
2. Description of the Related Art
Semiconductor integrated circuits incorporating a noise absorbing circuit have been conventionally known. For example, Japanese Laid-Open Patent No. 63-52513 Publication discloses a semiconductor integrated circuit which detects a change in the output of an output buffer circuit from a high logic level "H" to a low logic level "L" and interrupts to supply an input signal to the internal circuits for a period until a ground (GND) line becomes stable. Such an interruption prevent malfunction of the internal circuits caused by an undesirable potential rise produced on a power source line. FIG. 2 shows one example of a conventional circuit which prevents malfunction caused by voltage noise. That is, in the circuit shown in FIG. 2, incorporating output buffer circuits DO.sub.l to DO.sub.n and input buffer circuits DI.sub.l to DI.sub.m which are connected commonly to a GND line, output change detecting circuits SEN.sub.l to SEN.sub.n respectively detect a change in output level of the output buffer circuits DO.sub.l to DO.sub.n from "H" to "L".
When any one of the output buffer circuits changes its output level to "L", an operation control signal .phi..sub.l delivered from an AND gate circuit AND is forcibly turned into "L" during a delayed period caused by the respective inverters in the detecting circuits SEN.sub.l -SEN.sub.n. Then, all clocked inverter circuits CIV.sub.l to CIV.sub.n are held in a high impedance condition. As a result, the operation of signal supply from the input buffer circuits to the internal circuits is temporarily ceased during the delayed period. As a result, it is possible to prevent malfunction of the internal circuits when an undesirable potential rise caused by a change in level of an output signal from any one of the output buffer circuits occurs on the ground line.
However, the above-mentioned conventional circuit requires a circuit for holding an internal signal at a certain level during a period in which the operation of signal supply to the internal circuits is interrupted. Accordingly the circuit arrangement is complicated and large in scale. Further, since the above-mentioned noise causes a problem only at such a period when an input level "H" is erroneously determined to be "L", the protection of an input signal against the noise becomes meaningless at such a period when the input level is "L". However, the above-mentioned circuit interrupts the operation of signal supply to the internal circuits whenever an output from any one of the output buffer circuits changes from "H" to "L", irrespective of the condition of an input signal. Accordingly, the input signal is always delayed. Thus, the conventional circuit has disadvantages.